QUICK TECHNOLOGY, INC.
MODEL 486VLS
Processor | 80486SX/80487SX/80486DX/ODP486SX/80486DX2 |
Processor Speed | 20/25/33/50(internal)/50/66(internal)MHz |
Chip Set | SIS |
Max. Onboard DRAM | 32MB |
Cache | 32/64/128/256/512KB |
BIOS | AMI |
Dimensions | 306mm x 220mm |
I/O Options | 32-bit VESA local bus slots (3) |
NPU Options | None |

CONNECTIONS | |||
Purpose | Location | Purpose | Location |
External battery | CN2 | Power LED & keylock | CN7 |
Reset switch | CN4 | Turbo LED | CN8 |
Speaker | CN5 | 32-bit VESA local bus slave slot | S1 |
Turbo switch | CN6 | 32-bit VESA local bus master slots | S2 & S3 |
USER CONFIGURABLE SETTINGS | |||
Function | Jumper | Position | |
| » | Power good signal detect from power supply | JP2 | pins 2 & 3 closed |
Power good signal detect from board | JP2 | pins 1 & 2 closed | |
| » | Monitor type select color | JP3 | closed |
Monitor type select monochrome | JP3 | open | |
CPU TYPE CONFIGURATION | ||||
CPU type | JP21 | JP23 | JP24 | JP25 |
80486SX | pins 1 & 2 closed | open | open | pins 2 & 3 |
80487SX | pins 1 & 2 closed | closed | pins 2 & 3 | pins 1 & 2 |
80486DX | pins 1 & 2 closed | closed | pins 1 & 2 | pins 1 & 2 |
ODP486SX | pins 2 & 3 closed | closed | pins 1 & 2 | pins 1 & 2 |
80486DX2 | pins 1 & 2 closed | closed | pins 1 & 2 | pins 1 & 2 |
Note:Pins designated should be in the closed position | ||||
CPU SPEED CONFIGURATION | ||||
CPU speed | OSC | JP5 | JP19 | JP20 |
20MHz | 40MHz | pins 1 & 2 closed | pins 1 & 2 closed | pins 1 & 2 closed |
25MHz/50(internal) | 50MHz | pins 1 & 2 closed | pins 1 & 2 closed | pins 1 & 2 closed |
33MHz/66(internal) | 66MHz | pins 1 & 2 closed | pins 1 & 2 closed | pins 1 & 2 closed |
50MHz | 50MHz | pins 2 & 3 closed | pins 2 & 3 closed | pins 2 & 3 closed |
CACHE JUMPER CONFIGURATION | |||||||
Size | JP18 | JP17 | JP16 | JP15 | JP14 | JP13 | JP12 |
32KB | pins 1 & 2 | pins 1 & 2 | pins 1 & 2 | pins 1 & 2 | pins 1 & 2 | pins 1 & 2 | pins 1 & 2 |
64KB | pins 2 & 3 | pins 1 & 2 | pins 1 & 2 | pins 1 & 2 | pins 1 & 2 | pins 2 & 3 | pins 1 & 2 |
128KB | pins 1 & 2 | pins 1 & 2 | pins 2 & 3 | pins 1 & 2 | pins 2 & 3 | pins 2 & 3 | pins 1 & 2 |
256KB | pins 2 & 3 | pins 2 & 3 | pins 2 & 3 | pins 2 & 3 | pins 2 & 3 | pins 2 & 3 | pins 1 & 2 |
512KB | pins 2 & 3 | pins 2 & 3 | pins 2 & 3 | pins 2 & 3 | pins 2 & 3 | pins 2 & 3 | pins 2 & 3 |
Note:Pins designated should be in the closed position | |||||||
CACHE CONFIGURATION | |||
Size | Cache | Location | TAG |
32KB | (4) 8K x 8 | Bank 0 | (1) 8K x 8 |
64KB | (8) 8K x 8 | Banks 0 & 1 | (1) 8K x 8 |
128KB | (4) 32K x 8 | Bank 0 | (1) 32K x 8 |
256KB | (8) 32K x 8 | Banks 0 & 1 | (1) 32K x 8 |
512KB | (4) 128K x 8 | Bank 0 | (1) 128K x 8 |
DRAM CONFIGURATION | ||
Size | Bank 0 | Bank 1 |
1MB | (4) 256K x 9 | NONE |
2MB | (4) 256K x 9 | (4) 256K x 9 |
4MB | (4) 1M x 9 | NONE |
5MB | (4) 256K x 9 | (4) 1M x 9 |
8MB | (4) 1M x 9 | (4) 1M x 9 |
16MB | (4) 4M x 9 | NONE |
20MB | (4) 1M x 9 | (4) 4M x 9 |
32MB | (4) 4M x 9 | (4) 4M x 9 |