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This item is from the PC Hardware FAQ, by Willie Lim and Ralph Valentino with numerous contributions by others. (v1.25).

2.33 Which is better, ISA/EISA/VLB/PCI/etc?

[From: ralf@alum.wpi.edu (Ralph Valentino)]

Here is a quick overview of the various bus architectures available for the PC and some of the strengths and weaknesses of each. Some terms are described in more detail at the bottom.

XT bus:

	8 data bits, 20 address bits
	4.77 MHz

Comments: Obsolete, very similar to ISA bus, many XT cards will work in ISA slots. ISA bus:

        Industry Standard Architecture bus (aka. AT bus)
	8/16 data bits, 24 address bits (16Meg addressable)
	8-8.33MHz, asynchronous
	5.55M/s burst
	bus master support
	edge triggered TTL interrupts (IRQs) - no sharing
	low cost

Comments: ideal for low to mid bandwidth cards, though lack of IRQs can quickly become annoying. MCA bus:

        Micro Channel Architecture bus
	16/32 data bit, 32 address bits
	80M/s burst, synchronous
	full bus master capability
	good bus arbitration
	auto configurable
	IBM proprietary (not ISA/EISA/VLB compatible)

Comments: Since MCA was proprietary, EISA was formed to compete with it. EISA gained much more acceptance; MCA is all but dead. EISA bus:

        Enhanced Industry Standard Architecture bus
	32 data bits, 32 address bits
	8-8.33MHz, synchronous
	32M/s burst (sustained)
	full bus master capability
	good bus arbitration
	auto configurable
	sharable IRQs, DMA channels
	backward compatible with ISA
	some acceptance outside of the PC architecture
	high cost

Comments: EISA is great for high bandwidth bus mastering cards such as SCSI host adaptors, but its high cost limits its usefulness for other types of cards.

P-EISA:

        Pragmatic EISA (also Super-ISA)
	(see the description of the HiNT chipset elsewhere in this FAQ)

VLB:

        VESA Local Bus
	32 data bits, 32 address bits
	25-40MHz, asynchronous
	130M/s burst (sustained is closer to 32M/s)
	bus master capability
	will coexist with ISA/EISA
	slot limited to 2 or 3 cards typical
	backward compatible with ISA
	moderate cost

Comments: VLB is great for video cards, but its lack of a good bus arbiter limits its usefulness for bus mastering cards and its moderate cost limits its usefulness for low to mid bandwidth cards. Since it can coexist with EISA/ISA, a combination of all three types of cards usually works best. PCI:

        Peripheral Component Interconnect local bus
	32 data bits (64 bit option), 32 address bits (64 bit option)
	up to 33MHz, synchronous (upto 66MHz PCI 2.1 option)
	132M/s burst at 33MHz (sustained) (264M/s with 64 bit option)
	full bus master capability
	good bus arbitration
	slot limited to 3 or 4 cards typical
	auto configurable
	will coexist with ISA/EISA/MCA as well as another PCI bus
	strong acceptance outside of the PC architecture
	support for 5V and 3.3V peripheral cards
	moderate cost

Comments: The newest of the buses, combining the speed of VLB with the advanced arbitration of EISA. Great for both video cards and bus mastering SCSI/network cards.

Notes: 64 bit option was defined in the original PCI 2.0 spec. 66MHz operation is an option of the PCI 2.1 spec and is only available for the 3.3V PCI bus. PCI 2.1 compliance does NOT imply 66MHz operation.

Terms

Auto configurable: Allows software to identify the board's requirements and resolve any potential resource conflicts (IRQ/DMA/address/BIOS/etc).

Bus master support: Capable of First Party DMA transfers.

Full bus master capability: Can support any First Party cycle from any device, including another CPU.

Good bus arbitration: Fair bus access during conflicts, no need to back off unless another device needs the bus. This prevents CPU starvation while allowing a single device to use 100% of the available bandwidth. Other buses let a card hold the bus until it decides to release it and attempts to prevent starvation by having an active card voluntarily release the bus periodically ("bus on time") and remain off the bus for a period of time ("bus off time") to give other devices, including the CPU, a chance even if they don't want it.

16Meg addressable: This limits first party DMA transfers to the lower 16 Meg of address space. There are various software methods to overcome this problem when more than 16 Megs of main memory are available. This has no effect on the ability of the processor to reach all of main memory.

Backward compatible with ISA: Allows you to place an ISA card in the slot of a more advanced bus. Note, however, that the ISA card does not get any benefit from being in an advanced slot, instead, the slot reverts to an ISA slot. Other slots are unaffected.

 

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